@CFzLike, to me this looks like only half the chips can be addressed at the same time, comparing the circuit for rank 1 and rank 2 modules
(But maybe I'm overlooking something? FWIW I'm currently sick with a fever lol)
Edited 1y ago
@Purple the main thing with higher memory ranks is that you typically can't run as many DIMMs at as high a transfer rate, because the additional IC pins being connected to the same bus increases the parasitic capacitance (known as capacitive loading) on the line, which makes it harder to drive the lines to defined states within the necessary timings for high speed operation. this is also why you tend to see DIMM counts listed as a column on memory QVLs.
@Purple AIUI there will be a penalty for switching the active rank, which does mean a slightly slower practical performance, but the memory controller tries to minimise the effect.
@gsuberland I think this motherboard specifies that regardless of memory rank it all is able to run at the same maximum 2966Mhz (although because of my CPU 2400Mhz will be the maximum speed)
Any idea of what kind of performance loss I can expect from dual rank? It would save me roughly 150 euros (on 8x16gb of memory), but I'm not sure if it's worth it. CPU would run in a Six-Channel configuration (6x16GB per CPU), but I'm not running anything memory specific, I just want to optimize performance where possible :)
@Purple the performance loss is pretty miminal, to the point where it's probably statistically insignificant for your average workload.
the reason the single rank DIMMs are more expensive is that they have to use higher density DRAM ICs to reduce the capacitive loading, which makes them useful on 4DPC boards. but it looks like your board and CPU should handle this fine here.
@gsuberland Thanks! I'll just go for the dual rank then! Much appreciated
@Purple this is also why LRDIMMs are a thing, btw. the DRAM ICs can only get so dense, so if you want 128GB or 256GB DIMMs you often need to go up to higher ranks (more ICs). but then you're increasing the bus load significantly, so running 2DPC or 4DPC with traditional RDIMMs at QR or 8R it gets extremely difficult without dropping the transfer speeds significantly (thus widening the timings).
LRDIMMs add a buffer IC between the ranks and the bus to reduce the capacitive loading.
Edited 1y ago